The present invention relates to representing a simulation model of an integrated circuit (chip).
A simulator employs a processor chip model to provide detailed processor chip emulation to allow a user to create system designs using the chip. The simulator model represents the processor chip and provides the user with detailed system electrical responses of the processor chip within the system. The simulated behavior allows the user to verify the predicted responses of the system implementation using the processor chip.
A graphical user interface (GUI) can allow users to write microcode, which is translated into simulator commands. The GUI can also provide visual indications of processor chip responses. Users can develop microcode for use with designs before the design is fabricated, providing a head start for microcode development efforts.